- This article has been moved or is in the process of being moved to the Sinclair FAQ Wiki, under the "Floating bus" article. You may find more complete information there.
When the Z80 reads from an unattached port it will read the data present on the ULA bus, which will be a display byte being transferred to the video circuits or 0xFF when idle, such as periods spent building the border.
Each scanline of video memory fetches breaks down into a 16 x 8 cycle sequence with two sets of display and attribute bytes (order: bitmap, attribute, bitmap+1, attribute+1) being fetched during the first 4 cycles followed by 4 idle cycles. The ULA bus remains idle for the remainder of each scanline and returns 0xFF.
The following table shows the fetch cycles for the first 8 cycle sequence of the 48K and 128K models:
Note that these timings will all be one tstate later on "late timing" machines.
These 48K and 128K test programs may be used for testing an emulator's floating bus implementation. Note that the Z80 samples the data bus during the final T-state of the I/O machine cycle. All timings are relative to the ULA asserting the INTREQ line; as the Z80 samples this line during the final T-state of opcode execution, there is a minimum of a one cycle delay before the Z80 acknowledges the interrupt.
The same effect is likely to be seen when reading unattached memory, such as reading the upper 32K on a 16K machine.
A number of commercial games used the floating bus effect, generally to synchronise with the display and allow for flicker-free drawing. Games known to use the floating bus include:
- Arkanoid (original release only, the Hit Squad rerelease does not use the floating bus)
- Cobra (original release only, the Hit Squad rerelease does not use the floating bus)
- Short Circuit
- This document labels the first tstate which begins with /INT low as tstate 0; some other resources label this as tstate 1 which will mean all tstate counts are one greater.