Floating bus

When the Z80 reads from an unattached port it will read the data present on the ULA bus, which will be a display byte being transferred to the video circuits or 0xFF when idle, such as periods spent building the border.

Each scanline of video memory fetches breaks down into a 16 x 8 cycle sequence with two sets of display and attribute bytes (order: bitmap, attribute, bitmap+1, attribute+1) being fetched during the first 4 cycles followed by 4 idle cycles. The ULA bus remains idle for the remainder of each scanline and returns 0xFF.

The following table shows the fetch cycles for the first 8 cycle sequence of the 48K and 128K models: